Nimewo Pati :
SI5381E-E-GM
Deskripsyon :
UNPROGRAMMED PROTOYPING DEVICELT
Kalite :
Clock Jitter Attenuator
Sòti :
HCSL, LVCMOS, LVDS, LVPECL
Pwopòsyon - Antre: Sòti :
4:12
Diferansyèl - Antre: Sòti :
Yes/Yes
Frekans - Max :
735MHz, 2.94912GHz
Divize / Miltiplikatè :
Yes/No
Voltage - Pwovizyon pou :
1.71V ~ 3.47V
Operating Tanperati :
-40°C ~ 85°C
Mounting Kalite :
Surface Mount
Pake / Ka :
64-VFQFN Exposed Pad
Pake Aparèy Founisè :
64-QFN-EP (9x9)